A pulsed latching apparatus can also be referred to as a pulsed flip-flop, which is a high-speed clock-controlled storage device. In the past, the pulse width of the pulsed latching apparatus is not strictly defined, which results in lack of design standards of a pulse signal generator of the pulsed latching apparatus. However, in an actual application, the pulse width of the pulse signal provided by the pulse signal generator is rather sensitive to the operating voltage of the pulsed latching apparatus, so that the pulsed latching apparatus generally cannot be used in a system in which the operating voltage is wide-range and dynamically scaled.
Generally, if the pulse width of the pulse signal generated by the pulse signal generator is designed to be too wide, the hold time of the pulsed latching apparatus is increased to increase a chance of hold time violation. Conversely, if the pulse width of the pulse signal generated by the pulse signal generator is designed to be too narrow, the latching time delay of the pulsed latching apparatus is increased, which increases the chance of setup time violation and the error rate. It is simple to design a pulse signal with a suitable pulse width in allusion to a single operating voltage, though it is difficult to maintain stability thereof under a wide range of the operating voltage. Therefore, in the application of the pulsed latching apparatus with a wide range of the operating voltage, it is important to provide a pulse signal having an adaptive pulse width.